{"id":19247,"date":"2021-01-04T08:36:32","date_gmt":"2021-01-04T08:36:32","guid":{"rendered":"https:\/\/hocvienit.vn\/?p=19247"},"modified":"2024-07-03T12:14:51","modified_gmt":"2024-07-03T05:14:51","slug":"nhan-biet-22-linh-kien-trong-may-tinh-phan-1","status":"publish","type":"post","link":"https:\/\/hocvienit.vn\/?p=19247","title":{"rendered":"Nh\u1eadn bi\u1ebft 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh – Ph\u1ea7n 1"},"content":{"rendered":"

Trong qu\u00e1 tr\u00ecnh h\u1ecdc s\u1eeda laptop hay s\u1eeda ch\u1eefa m\u00e1y t\u00ednh, vi\u1ec7c \u0111\u1ea7u ti\u00ean b\u1ea1n c\u1ea7n l\u00e0m l\u00e0 x\u00e1c \u0111\u1ecbnh \u0111\u01b0\u1ee3c c\u00e1c linh ki\u1ec7n trong m\u00e1y t\u00ednh. C\u00f3 nh\u01b0 v\u1eady th\u00ec b\u1ea1n m\u1edbi c\u00f3 th\u1ec3 b\u1eaft b\u1ec7nh v\u00e0 ti\u1ebfn h\u00e0nh s\u1eeda ch\u1eefa ch\u00ednh x\u00e1c. Trong b\u00e0i vi\u1ebft ng\u00e0y h\u00f4m nay, H\u1ecdc vi\u1ec7n iT.vn s\u1ebd chia s\u1ebb t\u1edbi c\u00e1c b\u1ea1n c\u00e1ch nh\u1eadn bi\u1ebft v\u00e0 nh\u1eefng ki\u1ebfn th\u1ee9c c\u01a1 b\u1ea3n v\u1ec1 nh\u1eefng linh ki\u1ec7n trong m\u00e1y t\u00ednh ph\u1ea7n 1<\/strong>.<\/span><\/p>\n

\"Nh\u1eadn
Nh\u1eadn bi\u1ebft 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh – Ph\u1ea7n 1<\/span><\/figcaption><\/figure>\n

1. CPU<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m c\u1ee7a CPU<\/span><\/h3>\n

CPU<\/a><\/strong> l\u00e0 vi\u1ebft t\u1eaft c\u1ee7a c\u1ee5m t\u1eeb Ti\u1ebfng Anh Central Processing Unit, c\u00f3 ngh\u0129a l\u00e0 b\u1ed9 x\u1eed l\u00fd trung t\u00e2m. Trong \u0111\u00f3, \u0111\u00e2y l\u00e0 b\u1ed9 ph\u1eadn c\u00f3 nhi\u1ec7m v\u1ee5 t\u00ednh to\u00e1n, x\u1eed l\u00fd v\u00e0 \u0111\u01b0a ra l\u1ec7nh \u0111i\u1ec1u khi\u1ec3n d\u1ef1a tr\u00ean m\u1ecdi th\u00f4ng tin, thao t\u00e1c, d\u1eef li\u1ec7u c\u1ee7a m\u1ecdi ho\u1ea1t \u0111\u1ed9ng tr\u00ean m\u00e1y t\u00ednh.<\/span><\/span><\/p>\n

\"CPU
CPU trong m\u00e1y t\u00ednh<\/span><\/figcaption><\/figure>\n

Giao ti\u1ebfp c\u1ee7a CPU<\/span><\/h3>\n

CPU giao ti\u1ebfp tr\u1ef1c ti\u1ebfp v\u1edbi Chipset b\u1eafc th\u00f4ng qua c\u00e1c \u0111\u01b0\u1eddng Bus d\u1eef li\u1ec7u, Bus \u0111i\u1ec1u khi\u1ec3n v\u00e0 Bus \u0111\u1ecba ch\u1ec9.<\/span><\/p>\n

Nhi\u1ec7m v\u1ee5 c\u1ee7a CPU<\/span><\/h3>\n

CPU th\u1ef1c hi\u1ec7n c\u00e1c nhi\u1ec7m v\u1ee5 sau trong m\u00e1y t\u00ednh:<\/span><\/p>\n

– Th\u1ef1c hi\u1ec7n x\u1eed l\u00fd c\u00e1c ch\u01b0\u01a1ng tr\u00ecnh ph\u1ea7n m\u1ec1m b\u1eb1ng c\u00e1c ph\u00e9p to\u00e1n nh\u1ecb ph\u00e2n v\u00e0 to\u00e1n logic.\u00a0<\/span><\/p>\n

– Ph\u1ea7n m\u1ec1m c\u1ee7a m\u00e1y t\u00ednh bao g\u1ed3m:<\/span><\/p>\n

+ Ch\u01b0\u01a1ng tr\u00ecnh BIOS.<\/span><\/p>\n

+ Tr\u00ecnh \u0111i\u1ec1u khi\u1ec3n thi\u1ebft b\u1ecb.<\/span><\/p>\n

+ H\u1ec7 \u0111i\u1ec1u h\u00e0nh.<\/span><\/p>\n

+ Ch\u01b0\u01a1ng tr\u00ecnh \u1ee9ng d\u1ee5ng.<\/span><\/p>\n

+ H\u00ecnh \u1ea3nh, \u00e2m thanh, video s\u1ed1\u2026<\/span><\/p>\n

– K\u1ebft qu\u1ea3 x\u1eed l\u00fd l\u00e0:<\/span><\/p>\n

+ L\u1ec7nh \u0111i\u1ec1u khi\u1ec3n c\u00e1c thi\u1ebft b\u1ecb kh\u00e1c ho\u1ea1t \u0111\u1ed9ng.<\/span><\/p>\n

+ H\u00ecnh \u1ea3nh, \u00e2m thanh, k\u00fd t\u1ef1 d\u1ea1ng s\u1ed1 \u0111\u01b0\u1ee3c l\u01b0u trong RAM.<\/span><\/p>\n

\u0110i\u1ec7n \u00e1p ho\u1ea1t \u0111\u1ed9ng c\u1ee7a CPU<\/span><\/h3>\n

CPU s\u1eed d\u1ee5ng \u0111i\u1ec7n \u00e1p ho\u1ea1t \u0111\u1ed9ng ch\u00ednh l\u00e0 ngu\u1ed3n VCORE ph\u1ee5c v\u1ee5 cho x\u1eed l\u00fd trong nh\u00e2n chip v\u00e0 ngu\u1ed3n VIO ph\u1ee5c v\u1ee5 cho vi\u1ec7c giao ti\u1ebfp v\u1edbi c\u00e1c thi\u1ebft b\u1ecb kh\u00e1c.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a CPU<\/span><\/h3>\n

\u0110\u1ec3 CPU ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– C\u00f3 \u0111\u1ee7 hai \u0111i\u1ec7n \u00e1p nh\u01b0 tr\u00ean.<\/span><\/p>\n

– Ch\u00e2n Socket ti\u1ebfp x\u00fac t\u1ed1t.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u PWR_GD t\u1eeb chipset nam b\u00e1o cho bi\u1ebft c\u00e1c m\u1ea1ch ngu\u1ed3n \u0111\u00e3 t\u1ed1t.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u kh\u1edfi \u0111\u1ed9ng CPU_RST t\u1eeb chipset b\u1eafc t\u1edbi.<\/span><\/p>\n

 <\/p>\n

2. MCH – Chipset b\u1eafc<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m c\u1ee7a chip c\u1ea7u b\u1eafc<\/span><\/h3>\n

Chipset b\u1eafc<\/strong><\/span><\/a> hay c\u00f2n \u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 chip c\u1ea7u b\u1eafc (Memory Controller Hub – MCH). \u0110\u00e2y l\u00e0 linh ki\u1ec7n n\u1eb1m \u1edf g\u1ea7n \u0111\u1ea7u tr\u00ean ph\u00eda b\u1eafc c\u1ee7a bo m\u1ea1ch ch\u1ee7. N\u00f3 k\u1ebft n\u1ed1i tr\u1ef1c ti\u1ebfp v\u1edbi CPU v\u00e0 c\u00f3 nhi\u1ec7m v\u1ee5 k\u1ebft n\u1ed1i gi\u1eefa c\u00e1c b\u1ed9 ph\u1eadn ph\u1ea7n c\u1ee9ng trong h\u1ec7 th\u1ed1ng (C\u00e1c b\u1ed9 ph\u1eadn ph\u1ea7n c\u1ee9ng bao g\u1ed3m RAM, vi \u0111i\u1ec1u khi\u1ec3n giao ti\u1ebfp PCI Express hay vi \u0111i\u1ec1u khi\u1ec3n AGP (Accelerated Graphics Port tr\u00ean c\u00e1c bo m\u1ea1ch \u0111\u1eddi c\u0169).\u00a0<\/span><\/span><\/p>\n

B\u1edfi c\u00e1c b\u1ed9 ph\u1eadn ph\u1ea7n c\u1ee9ng kh\u00f4ng th\u1ec3 giao ti\u1ebfp v\u1edbi nhau n\u1ebfu kh\u00f4ng c\u00f3 chip c\u1ea7u b\u1eafc n\u00ean c\u00f3 th\u1ec3 n\u00f3i chip c\u1ea7u b\u1eafc \u0111\u00f3ng m\u1ed9t vai tr\u00f2 v\u00f4 c\u00f9ng quan tr\u1ecdng trong m\u00e1y t\u00ednh.<\/span><\/p>\n

Giao ti\u1ebfp c\u1ee7a chip c\u1ea7u b\u1eafc<\/span><\/h3>\n

MCH giao ti\u1ebfp tr\u1ef1c ti\u1ebfp v\u1edbi CPU, RAM, Chip Video, Chipset nam.<\/span><\/p>\n

Ch\u1ee9c n\u0103ng c\u1ee7a chip c\u1ea7u b\u1eafc<\/span><\/h3>\n

Chipset b\u1eafc th\u1ef1c hi\u1ec7n c\u00e1c nhi\u1ec7m v\u1ee5 sau trong m\u00e1y t\u00ednh:<\/span><\/p>\n

– \u0110i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 Bus cho c\u00e1c thi\u1ebft b\u1ecb tr\u00ean.<\/span><\/p>\n

– Chuy\u1ec3n m\u1ea1ch d\u1eef li\u1ec7u \u0111\u1ec3 cho c\u00e1c t\u00edn hi\u1ec7u ho\u1ea1t \u0111\u1ed9ng li\u00ean t\u1ee5c.<\/span><\/p>\n

– \u0110i\u1ec1u khi\u1ec3n t\u00edn hi\u1ec7u cho m\u00e0n h\u00ecnh (N\u1ebfu t\u00edch h\u1ee3p chip video).<\/span><\/p>\n

\u0110i\u1ec7n \u00e1p ho\u1ea1t \u0111\u1ed9ng c\u1ee7a chip c\u1ea7u b\u1eafc<\/span><\/h3>\n

\u0110\u1ec3 MCH ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– S\u1eed d\u1ee5ng chung \u0111i\u1ec7n \u00e1p VCORE v\u1edbi CPU.<\/span><\/p>\n

– S\u1eed d\u1ee5ng chung \u0111i\u1ec7n \u00e1p VIDEO_CORE v\u1edbi chip video.<\/span><\/p>\n

– S\u1eed d\u1ee5ng chung \u0111i\u1ec7n \u00e1p 2,5V ho\u1eb7c 1,8V v\u1edbi Ram.<\/span><\/p>\n

– S\u1eed d\u1ee5ng chung \u0111i\u1ec7n \u00e1p 1,5V v\u1edbi chipset nam.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a chip c\u1ea7u b\u1eafc<\/span><\/h3>\n

\u0110\u1ec3 chip c\u1ea7u b\u1eafc ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– C\u00f3 \u00edt nh\u1ea5t hai \u0111i\u1ec7n \u00e1p cung c\u1ea5p l\u00e0 VCORE v\u00e0 \u0111i\u1ec7n \u00e1p 1.5V.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u reset h\u1ec7 th\u1ed1ng (RPL_RST ho\u1eb7c PCI_RST) kh\u1edfi \u0111\u1ed9ng, t\u00edn hi\u1ec7u n\u00e0y xu\u1ea5t ph\u00e1t t\u1eeb Chipset nam.<\/span><\/p>\n

Bi\u1ec3u hi\u1ec7n khi Chipset b\u1eafc kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng<\/span><\/h3>\n

Khi chipset b\u1eafc kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng th\u00ec b\u1ea1n s\u1ebd th\u1ea5y m\u00e1y c\u00f3 t\u00edn hi\u1ec7u reset h\u1ec7 th\u1ed1ng nh\u01b0ng CPU kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng, kh\u00f4ng \u0111\u1ecdc m\u00e3 BIOS, kh\u00f4ng b\u00e1o s\u1ef1 c\u1ed1 g\u00ec c\u1ea3, c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n. N\u1ebfu Chipset b\u1eafc b\u1ecb ch\u1eadp th\u00ec \u0111\u00e8n b\u00e1o ngu\u1ed3n ch\u1edbp s\u00e1ng r\u1ed3i t\u1eaft.<\/span><\/p>\n

\"Chipset
Chipset b\u1eafc v\u00e0 chipset nam trong m\u00e1y t\u00ednh<\/span><\/figcaption><\/figure>\n

3. ICH – Chipset nam<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m c\u1ee7a chip c\u1ea7u nam<\/span><\/h3>\n

Chipset nam<\/a><\/strong> hay c\u00f2n \u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 chip c\u1ea7u nam (I\/O Controller Hub – ICH). S\u1edf d\u0129 con chip n\u00e0y c\u00f3 c\u00e1i t\u00ean nh\u01b0 v\u1eady l\u00e0 do n\u00f3 n\u1eb1m \u1edf ph\u00eda Nam so v\u1edbi chip c\u1ea7u b\u1eafc trong s\u01a1 \u0111\u1ed3 kh\u1ed1i bo m\u1ea1ch ch\u1ee7.<\/span><\/span><\/p>\n

\u0110\u00e2y l\u00e0 con chip c\u00f3 ch\u1ee9c n\u0103ng li\u00ean l\u1ea1c v\u1edbi c\u00e1c thi\u1ebft b\u1ecb c\u00f3 t\u1ed1c \u0111\u1ed9 ch\u1eadm h\u01a1n tr\u00ean bo m\u1ea1ch ch\u1ee7. Tr\u00ean th\u1ef1c t\u1ebf \u0111\u1ec3 k\u1ebft n\u1ed1i v\u1edbi CPU, chip c\u1ea7u nam ph\u1ea3i th\u00f4ng qua chip c\u1ea7u b\u1eafc. Th\u00f4ng th\u01b0\u1eddng, chip c\u1ea7u nam c\u00f3 th\u1ec3 l\u00e0m vi\u1ec7c v\u1edbi nhi\u1ec1u chip c\u1ea7u b\u1eafc v\u1edbi thi\u1ebft k\u1ebf t\u01b0\u01a1ng th\u00edch v\u1edbi nhau.<\/span><\/p>\n

Giao ti\u1ebfp c\u1ee7a chip c\u1ea7u nam<\/span><\/h3>\n

Chip c\u1ea7u nam giao ti\u1ebfp tr\u1ef1c ti\u1ebfp v\u1edbi Chipset b\u1eafc, card PCI, c\u00e1c \u1ed5 \u0111\u0129a, chip \u0111i\u1ec1u khi\u1ec3n ngu\u1ed3n, chip SIO v\u00e0 BIOS.<\/span><\/p>\n

Ch\u1ee9c n\u0103ng c\u1ee7a chip c\u1ea7u nam<\/span><\/h3>\n

Chipset nam th\u1ef1c hi\u1ec7n c\u00e1c nhi\u1ec7m v\u1ee5 sau trong m\u00e1y t\u00ednh:<\/span><\/p>\n

– \u0110i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 Bus cho c\u00e1c th\u00e0nh ph\u1ea7n tr\u00ean v\u00e0 \u0111i\u1ec1u khi\u1ec3n chuy\u1ec3n m\u1ea1ch d\u1eef li\u1ec7u.<\/span><\/p>\n

– T\u1ea1o t\u00edn hi\u1ec7u Reset h\u1ec7 th\u1ed1ng (PCI_RST ho\u1eb7c PLT_RST) \u0111\u1ec3 kh\u1edfi \u0111\u1ed9ng c\u00e1c th\u00e0nh ph\u1ea7n tr\u00ean m\u00e1y khi m\u1edbi b\u1eadt ngu\u1ed3n.<\/span><\/p>\n

\u0110i\u1ec7n \u00e1p ho\u1ea1t \u0111\u1ed9ng c\u1ee7a chip c\u1ea7u nam<\/span><\/h3>\n

\u0110\u1ec3 ICH ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– S\u1eed d\u1ee5ng ngu\u1ed3n ch\u00ednh l\u00e0 1.5V l\u00e0 ngu\u1ed3n chung v\u1edbi Chipset b\u1eafc.<\/span><\/p>\n

– Ngu\u1ed3n 3.3V, ngu\u1ed3n 5V th\u1ee9 c\u1ea5p, ngu\u1ed3n 5V c\u1ea5p tr\u01b0\u1edbc.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a chip c\u1ea7u nam<\/span><\/h3>\n

\u0110\u1ec3 chip c\u1ea7u nam ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– C\u1ea7n c\u00f3 c\u00e1c ngu\u1ed3n \u0111i\u1ec7n \u00e1p cung c\u1ea5p nh\u01b0 tr\u00ean.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u PWR_OK b\u00e1o v\u1ec1 t\u1eeb chip qu\u1ea3n l\u00fd ngu\u1ed3n.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u VRM_GD b\u00e1o v\u1ec1 t\u1eeb m\u1ea1ch c\u1ea5p ngu\u1ed3n cho CPU.<\/span><\/p>\n

– C\u00f3 xung Clock.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u Reset t\u1eeb chip qu\u1ea3n l\u00fd ngu\u1ed3n kh\u1edfi \u0111\u1ed9ng.<\/span><\/p>\n

Bi\u1ec3u hi\u1ec7n khi Chipset nam kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng<\/span><\/h3>\n

Khi Chipset nam kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng, m\u00e1y s\u1ebd m\u1ea5t t\u00edn hi\u1ec7u reset h\u1ec7 th\u1ed1ng (PLT_RST) v\u00e0 Chipset b\u1eafc, CPU c\u0169ng kh\u00f4ng ch\u1ea1y v\u00e0 m\u00e1y v\u1eabn c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n.<\/span><\/p>\n

 <\/p>\n

4. M\u1ea1ch Clock Gen<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m m\u1ea1ch Clock Gen<\/span><\/h3>\n

M\u1ea1ch Clock Gen<\/strong><\/span><\/a> hay c\u00f2n g\u1ecdi l\u00e0 m\u1ea1ch xung Clock ho\u1eb7c xung nh\u1ecbp ch\u1ee7 c\u1ee7a m\u00e1y t\u00ednh. Trong \u0111\u00f3, c\u00e1i t\u00ean \u201cClock\u201d \u0111\u01b0\u1ee3c \u0111\u1eb7t l\u00e0 do c\u00e1c xung nh\u1ecbp ch\u1ee7 ho\u1ea1t \u0111\u1ed9ng r\u1ea5t ch\u00ednh x\u00e1c v\u1ec1 th\u1eddi gian. H\u1ea7u h\u1ebft t\u1ea5t c\u1ea3 c\u00e1c b\u1ed9 ph\u1eadn trong m\u00e1y t\u00ednh \u0111\u1ec1u c\u1ea7n \u0111\u1ebfn xung Clock th\u00ec m\u1edbi c\u00f3 th\u1ec3 ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c.<\/span><\/span><\/p>\n

\"M\u1ea1ch
M\u1ea1ch Clock Gen trong m\u00e1y t\u00ednh<\/span><\/figcaption><\/figure>\n

Ch\u1ee9c n\u0103ng c\u1ee7a m\u1ea1ch Clock Gen<\/span><\/h3>\n

M\u1ea1ch xung Clock th\u1ef1c hi\u1ec7n c\u00e1c nhi\u1ec7m v\u1ee5 sau trong m\u00e1y t\u00ednh:<\/span><\/p>\n

– T\u1ea1o ra xung Clock \u0111\u1ec3 cung c\u1ea5p cho c\u00e1c th\u00e0nh ph\u1ea7n tr\u00ean m\u00e1y ho\u1ea1t \u0111\u1ed9ng.<\/span><\/p>\n

– \u0110\u1ed3ng b\u1ed9 v\u1ec1 d\u1eef li\u1ec7u trong to\u00e0n h\u1ec7 th\u1ed1ng.<\/span><\/p>\n

– C\u00e1c xung Clock cung c\u1ea5p cho c\u00e1c th\u00e0nh ph\u1ea7n quy\u1ebft \u0111\u1ecbnh t\u1ed1c \u0111\u1ed9 Bus c\u1ee7a c\u00e1c th\u00e0nh ph\u1ea7n \u0111\u00f3.<\/span><\/p>\n

– N\u1ebfu m\u1ea5t xung Clock th\u00ec c\u00e1c IC x\u1eed l\u00fd s\u1ed1 s\u1ebd kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a m\u1ea1ch xung Clock<\/span><\/h3>\n

IC Clock Gen s\u1eed d\u1ee5ng \u0111i\u1ec7n \u00e1p 3.3V<\/span><\/p>\n

C\u1ea5u t\u1ea1o c\u1ee7a m\u1ea1ch xung Clock<\/span><\/h3>\n

Th\u00e0nh ph\u1ea7n c\u1ee7a m\u1ea1ch xung Clock bao g\u1ed3m IC t\u1ea1o xung v\u00e0 th\u1ea1ch anh dao \u0111\u1ed9ng 14.3Mhz.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a m\u1ea1ch Clock Gen<\/span><\/h3>\n

\u0110\u1ec3 m\u1ea1ch Clock Gen ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– C\u00f3 ngu\u1ed3n 3.3V c\u1ea5p cho IC.<\/span><\/p>\n

– C\u00f3 t\u00edn hi\u1ec7u CLK_EN t\u1eeb m\u1ea1ch c\u1ea5p ngu\u1ed3n cho CPU b\u00e1o v\u1ec1 khi m\u1ea1ch n\u00e0y ho\u1ea1t \u0111\u1ed9ng t\u1ed1t.<\/span><\/p>\n

– Th\u1ea1ch anh v\u00e0 IC t\u1ed1t.<\/span><\/p>\n

Bi\u1ec3u hi\u1ec7n khi m\u1ea1ch Clock Gen kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng<\/span><\/h3>\n

Khi m\u1ea1ch Clock Gen kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng, m\u00e1y s\u1ebd m\u1ea5t xung Clock. Chipset nam v\u00e0 c\u00e1c IC x\u1eed l\u00fd s\u1ed1 kh\u00e1c s\u1ebd kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng, m\u00e1y m\u1ea5t t\u00edn hi\u1ec7u Reset h\u1ec7 th\u1ed1ng, v\u1eabn c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n.<\/span><\/p>\n

 <\/p>\n

5. Chip video<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m chip video<\/span><\/h3>\n

Chip video <\/a><\/strong>hay c\u00f2n \u0111\u01b0\u1ee3c g\u1ecdi l\u00e0 Chip VGA ho\u1eb7c Chip x\u1eed l\u00fd \u0111\u1ed3 h\u1ecda. N\u00f3 ch\u1ecbu tr\u00e1ch nhi\u1ec7m x\u1eed l\u00fd c\u00e1c th\u00f4ng tin v\u1ec1 h\u00ecnh \u1ea3nh laptop gi\u00fap ng\u01b0\u1eddi s\u1eed d\u1ee5ng th\u1ea5y \u0111\u01b0\u1ee3c nh\u1eefng h\u00ecnh \u1ea3nh khi thao t\u00e1c v\u1edbi laptop nh\u01b0 s\u1eed d\u1ee5ng \u0111\u1ed3 h\u1ecda, xem phim, ch\u01a1i game.\u00a0<\/span><\/span><\/p>\n

\"Chip
Chip Video trong m\u00e1y t\u00ednh<\/span><\/figcaption><\/figure>\n

Giao ti\u1ebfp c\u1ee7a chip video<\/span><\/h3>\n

– Chip video giao ti\u1ebfp v\u1edbi Chipset b\u1eafc v\u00e0 nh\u1eadn d\u1eef li\u1ec7u t\u1eeb Chipset b\u1eafc.<\/span><\/p>\n

– M\u1ed9t s\u1ed1 tr\u01b0\u1eddng h\u1ee3p chip Video \u0111\u01b0\u1ee3c t\u00edch h\u1ee3p trong Chipset b\u1eafc.<\/span><\/p>\n

Ch\u1ee9c n\u0103ng c\u1ee7a chip video<\/span><\/h3>\n

Chip video th\u1ef1c hi\u1ec7n nhi\u1ec7m v\u1ee5 x\u1eed l\u00fd d\u1eef li\u1ec7u r\u1ed3i cung c\u1ea5p cho m\u00e0n h\u00ecnh LCD ho\u1eb7c m\u00e0n h\u00ecnh CRT.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a chip video<\/span><\/h3>\n

\u0110\u1ec3 chip video ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– Chip Video s\u1eed d\u1ee5ng \u0111i\u1ec7n \u00e1p ri\u00eang l\u00e0 VIDEO_CORE.<\/span><\/p>\n

– \u0110i\u1ec7n \u00e1p 1.8V \u0111\u1ec3 chung v\u1edbi \u0111i\u1ec7n \u00e1p c\u1ee7a RAM g\u1ea7n chip.<\/span><\/p>\n

– \u0110i\u1ec7n \u00e1p 3V cho m\u1ea1ch x\u1eed l\u00fd CRT v\u00e0 TV.<\/span><\/p>\n

– B\u1ea3n th\u00e2n chip ho\u1ea1t \u0111\u1ed9ng, kh\u00f4ng bong ch\u00e2n.<\/span><\/p>\n

Bi\u1ec3u hi\u1ec7n khi chip video kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng<\/span><\/h3>\n

– M\u00e1y kh\u00f4ng l\u00ean m\u00e0n h\u00ecnh, kh\u00f4ng s\u00e1ng m\u00e0n.<\/span><\/p>\n

– H\u00ecnh \u1ea3nh b\u1ecb r\u00e1c, nhi\u1ec5u m\u00e0u, h\u00ecnh ch\u1eadp ch\u1eddn.<\/span><\/p>\n

– Kh\u00f4ng c\u00f3 d\u1eef li\u1ec7u xu\u1ea5t ra m\u00e0n h\u00ecnh CRT.<\/span><\/p>\n

– N\u1ebfu ki\u1ec3m tra b\u1eb1ng Card Test th\u00ec th\u1ea5y s\u1ed1 Hecxa nh\u1ea3y g\u1ea7n h\u1ebft, nh\u01b0ng kh\u00f4ng th\u1ea5y hi\u1ec7n h\u00ecnh \u1ea3nh.<\/span><\/p>\n

 <\/p>\n

6. B\u1ed9 nh\u1edb RAM<\/strong><\/span><\/h2>\n

Kh\u00e1i ni\u1ec7m c\u1ee7a RAM<\/span><\/h3>\n

RAM<\/a><\/strong> l\u00e0 vi\u1ebft t\u1eaft c\u1ee7a c\u1ee5m t\u1eeb Ti\u1ebfng Anh: Random Access Memory. N\u00f3 l\u00e0 m\u1ed9t lo\u1ea1i b\u1ed9 nh\u1edb c\u00f3 kh\u1ea3 bi\u1ebfn truy xu\u1ea5t \u0111\u1ecdc-ghi ng\u1eabu nhi\u00ean \u0111\u1ebfn b\u1ea5t k\u1ef3 v\u1ecb tr\u00ed n\u00e0o trong b\u1ed9 nh\u1edb d\u1ef1a theo \u0111\u1ecba ch\u1ec9 \u00f4 nh\u1edb. Nh\u01b0ng nh\u1eefng th\u00f4ng tin \u0111\u01b0\u1ee3c l\u01b0u tr\u00ean RAM ch\u1ec9 l\u00e0 t\u1ea1m th\u1eddi cho n\u00ean ch\u00fang s\u1ebd m\u1ea5t \u0111i khi m\u1ea5t ngu\u1ed3n \u0111i\u1ec7n cung c\u1ea5p.<\/span><\/span><\/p>\n

\"RAM
RAM trong m\u00e1y t\u00ednh<\/span><\/figcaption><\/figure>\n

Giao ti\u1ebfp c\u1ee7a RAM<\/span><\/h3>\n

– RAM giao ti\u1ebfp tr\u1ef1c ti\u1ebfp v\u1edbi Chipset b\u1eafc tr\u00ean c\u00e1c d\u00f2ng m\u00e1y d\u00f9ng chip INTEL v\u00e0 giao ti\u1ebfp v\u1edbi CPU tr\u00ean c\u00e1c d\u00f2ng m\u00e1y d\u00f9ng chip AMD.<\/span><\/p>\n

– B\u1ed9 nh\u1edb RAM giao ti\u1ebfp v\u1edbi Chipset b\u1eafc qua \u0111\u01b0\u1eddng Bus nh\u01b0 Bus \u0111i\u1ec1u khi\u1ec3n, Bus d\u1eef li\u1ec7u v\u00e0 Bus \u0111\u1ecba ch\u1ec9.<\/span><\/p>\n

Ch\u1ee9c n\u0103ng c\u1ee7a b\u1ed9 nh\u1edb RAM<\/span><\/h3>\n

Trong laptop, b\u1ed9 nh\u1edb RAM th\u1ef1c hi\u1ec7n c\u00e1c ch\u1ee9c n\u0103ng sau:<\/span><\/p>\n

– L\u00e0 b\u1ed9 nh\u1edb t\u1ea1m th\u1eddi ch\u1ec9 l\u01b0u d\u1eef li\u1ec7u khi m\u00e1y \u0111ang ch\u1ea1y \u0111\u1ec3 cung c\u1ea5p tr\u1ef1c ti\u1ebfp cho CPU trong qu\u00e1 tr\u00ecnh x\u1eed l\u00fd.<\/span><\/p>\n

– T\u1ea5t c\u1ea3 c\u00e1c d\u1eef li\u1ec7u hay ch\u01b0\u01a1ng tr\u00ecnh b\u1ea1n \u0111ang m\u1edf ra v\u00e0 hi\u1ec3n th\u1ecb tr\u00ean m\u00e0n h\u00ecnh ch\u00fang \u0111\u1ec1u \u0111\u00e3 \u0111\u01b0\u1ee3c t\u1ea3i l\u00ean RAM.<\/span><\/p>\n

\u0110i\u1ec1u ki\u1ec7n ho\u1ea1t \u0111\u1ed9ng c\u1ee7a RAM<\/span><\/h3>\n

\u0110\u1ec3 RAM ho\u1ea1t \u0111\u1ed9ng \u0111\u01b0\u1ee3c th\u00ec n\u00f3 c\u1ea7n th\u1ecfa m\u00e3n c\u00e1c \u0111i\u1ec1u ki\u1ec7n sau:<\/span><\/p>\n

– RAM \u0111\u01b0\u1ee3c c\u1ea5p hai \u0111i\u1ec7n \u00e1p: \u00c1p ch\u00ednh l\u00e0 2.5V v\u00e0 \u00e1p ph\u1ee5 l\u00e0 1.25V(DDR) ho\u1eb7c 1.8V v\u00e0 0.9V(DDR2).<\/span><\/p>\n

– C\u00e1c ch\u00e2n RAM ti\u1ebfp x\u00fac t\u1ed1t.<\/span><\/p>\n

Bi\u1ec3u hi\u1ec7n khi RAM kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng:<\/span><\/h3>\n

Khi RAM kh\u00f4ng ho\u1ea1t \u0111\u1ed9ng th\u00ec CPU v\u1eabn ho\u1ea1t \u0111\u1ed9ng v\u00e0 ch\u1ea1y ch\u01b0\u01a1ng tr\u00ecnh BIOS, khi ki\u1ec3m tra \u0111\u1ebfn RAM ch\u01b0\u01a1ng tr\u00ecnh s\u1ebd ph\u00e1t ra ti\u1ebfng \u2018b\u00edp\u2019 ho\u1eb7c xu\u1ea5t m\u00e3 Hecxa l\u1ed7i C ho\u1eb7c E ra Card Test.<\/span><\/p>\n

Tr\u00ean \u0111\u00e2y l\u00e0 chia s\u1ebb c\u1ee7a H\u1ecdc vi\u1ec7n iT.vn v\u1ec1 6 linh ki\u1ec7n \u0111\u1ea7u ti\u00ean trong 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh. Hy v\u1ecdng nh\u1eefng ki\u1ebfn th\u1ee9c n\u00e0y c\u00f3 th\u1ec3 gi\u00fap \u00edch cho b\u1ea1n trong qu\u00e1 tr\u00ecnh h\u1ecdc t\u1eadp v\u00e0 l\u00e0m vi\u1ec7c. N\u1ebfu c\u00f3 b\u1ea5t c\u1ee9 th\u1eafc m\u1eafc n\u00e0o th\u00ec h\u00e3y \u0111\u1ec3 l\u1ea1i b\u00ecnh lu\u1eadn ngay b\u00ean d\u01b0\u1edbi b\u00e0i vi\u1ebft n\u00e0y ho\u1eb7c inbox tr\u1ef1c ti\u1ebfp cho H\u1ecdc vi\u1ec7n iT.vn \u0111\u1ec3 \u0111\u01b0\u1ee3c gi\u1ea3i \u0111\u00e1p t\u1ed1t nh\u1ea5t. Ch\u00fac b\u1ea1n th\u00e0nh c\u00f4ng!<\/span><\/p>\n

C\u00e1c b\u00e0i vi\u1ebft li\u00ean quan:<\/span><\/p>\n

Nh\u1eadn bi\u1ebft 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh \u2013 Ph\u1ea7n 2<\/a><\/span><\/p>\n

Nh\u1eadn bi\u1ebft 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh \u2013 Ph\u1ea7n 3<\/a><\/span><\/p><\/blockquote>\n

M\u1ecdi chi ti\u1ebft xin vui l\u00f2ng li\u00ean h\u1ec7:
\n<\/i>C\u00d4NG TY C\u1ed4 PH\u1ea6N H\u1eccC VI\u1ec6N IT
\n<\/strong>MST: 0108733789
\n<\/strong>T\u1ed5ng \u0111\u00e0i h\u1ed7 tr\u1ee3: 024 3566 8686 \u2013 Hotline: 0981 223 001
\n<\/strong>Facebook:<\/strong>\u00a0www.fb.com\/hocvienit<\/a>
\n\u0110\u0103ng k\u00fd k\u00eanh Youtube \u0111\u1ec3 theo d\u00f5i c\u00e1c b\u00e0i h\u1ecdc c\u1ee7a Hu\u1ea5n luy\u1ec7n vi\u00ean t\u1ed1t nh\u1ea5t:<\/strong>\u00a0http:\/\/bit.ly\/Youtube_HOCVIENiT<\/a>
\nH\u1ec7 th\u1ed1ng c\u01a1 s\u1edf \u0111\u00e0o t\u1ea1o:\u00a0<\/b>https:\/\/hocvienit.vn\/lien-he\/<\/a>
\nH\u1ecdc vi\u1ec7n IT.vn \u2013 Truy\u1ec1n ngh\u1ec1 th\u1ef1c t\u1ebf c\u00f9ng b\u1ea1n \u0111\u1ebfn th\u00e0nh c\u00f4ng!\u00a0<\/i><\/strong><\/p>\n

 <\/p>\n","protected":false},"excerpt":{"rendered":"

Trong qu\u00e1 tr\u00ecnh h\u1ecdc s\u1eeda laptop hay s\u1eeda ch\u1eefa m\u00e1y t\u00ednh, vi\u1ec7c \u0111\u1ea7u ti\u00ean b\u1ea1n c\u1ea7n l\u00e0m l\u00e0 x\u00e1c \u0111\u1ecbnh \u0111\u01b0\u1ee3c c\u00e1c linh ki\u1ec7n trong m\u00e1y t\u00ednh. C\u00f3 nh\u01b0 v\u1eady th\u00ec b\u1ea1n m\u1edbi c\u00f3 th\u1ec3 b\u1eaft b\u1ec7nh v\u00e0 ti\u1ebfn h\u00e0nh s\u1eeda ch\u1eefa ch\u00ednh x\u00e1c. Trong b\u00e0i vi\u1ebft ng\u00e0y h\u00f4m nay, H\u1ecdc vi\u1ec7n iT.vn s\u1ebd chia s\u1ebb t\u1edbi c\u00e1c b\u1ea1n c\u00e1ch nh\u1eadn bi\u1ebft 22 linh ki\u1ec7n trong m\u00e1y t\u00ednh – Ph\u1ea7n 1.<\/p>\n","protected":false},"author":95,"featured_media":19292,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[734],"tags":[745,658,280,657,366,313,357],"_links":{"self":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts\/19247"}],"collection":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/users\/95"}],"replies":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=19247"}],"version-history":[{"count":0,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts\/19247\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/media\/19292"}],"wp:attachment":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=19247"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=19247"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=19247"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}