{"id":1616,"date":"2018-07-06T06:53:18","date_gmt":"2018-07-06T06:53:18","guid":{"rendered":"https:\/\/hocvienit.vn\/?p=1616"},"modified":"2025-02-27T15:21:09","modified_gmt":"2025-02-27T08:21:09","slug":"phuong-phap-kiem-tra-khoi-nguon-may-ibm","status":"publish","type":"post","link":"https:\/\/hocvienit.vn\/?p=1616","title":{"rendered":"Ph\u01b0\u01a1ng ph\u00e1p ki\u1ec3m tra kh\u1ed1i ngu\u1ed3n m\u00e1y IBM"},"content":{"rendered":"

M\u00e1y t\u00ednh IBM l\u00e0 d\u00f2ng m\u00e1y kh\u00e1 ph\u1ed5 bi\u1ebfn. V\u00ec v\u1eady, vi\u1ec7c ki\u1ec3m tra kh\u1ed1i ngu\u1ed3n m\u00e1y IBM l\u00e0 r\u1ea5t quan tr\u1ecdng. H\u00e3y c\u00f9ng H\u1ecdc vi\u1ec7n iT t\u00ecm hi\u1ec3u ph\u01b0\u01a1ng ph\u00e1p n\u00e0y nh\u00e9!<\/p>\n

\"Ph\u01b0\u01a1ng
Ph\u01b0\u01a1ng ph\u00e1p ki\u1ec3m tra kh\u1ed1i ngu\u1ed3n m\u00e1y IBM<\/figcaption><\/figure>\n

1. Ph\u00e2n t\u00edch qu\u00e1 tr\u00ecnh kh\u1edfi \u0111\u1ed9ng m\u00e1y IBM<\/strong><\/span><\/h2>\n

M\u00e1y IBM n\u00f3i ri\u00eang v\u00e0 c\u00e1c m\u00e1y Laptop kh\u00e1c n\u00f3i chung \u0111\u1ec1u c\u00f3 m\u1ed9t qu\u00e1 tr\u00ecnh ho\u1ea1t \u0111\u1ed9ng c\u1ee7a kh\u1ed1i ngu\u1ed3n t\u01b0\u01a1ng t\u1ef1 nh\u01b0 nhau- \u0111\u00f3 l\u00e0 qu\u00e1 tr\u00ecnh c\u00e1c ngu\u1ed3n \u0111i\u1ec7n xu\u1ea5t hi\u1ec7n d\u1ea7n d\u1ea7n, ngu\u1ed3n \u0111i\u1ec7n c\u00f3 tr\u01b0\u1edbc l\u00e0 \u0111i\u1ec1u ki\u1ec7n \u0111\u1ec3 cho ngu\u1ed3n \u0111i\u1ec7n c\u00f3 sau ho\u1ea1t \u0111\u1ed9ng. Qu\u00e1 tr\u00ecnh ho\u1ea1t \u0111\u1ed9ng c\u1ee7a to\u00e0n b\u1ed9 kh\u1ed1i ngu\u1ed3n c\u00f3 t\u00ednh ch\u1ea5t b\u1eafc c\u1ea7u, n\u1ed1i ti\u1ebfp. N\u1ebfu t\u1eafc \u1edf m\u1ed9t giai \u0111o\u1ea1n n\u00e0o \u0111\u00f3 th\u00ec c\u00e1c ngu\u1ed3n \u0111i\u1ec7n ph\u00eda sau s\u1ebd kh\u00f4ng xu\u1ea5t hi\u1ec7n.<\/span><\/p>\n

C\u00e1c b\u01b0\u1edbc m\u1edf ngu\u1ed3n tr\u00ean m\u00e1y IBM T42:<\/span><\/p>\n

\"C\u00e1c
C\u00e1c b\u01b0\u1edbc m\u1edf ngu\u1ed3n tr\u00ean m\u00e1y IBM T42<\/figcaption><\/figure>\n

B1:<\/strong> Khi c\u1eafm \u0111i\u1ec7n t\u1eeb Adapter v\u00e0o r\u1eafc DCIN, \u0111i\u1ec7n \u00e1p 16V \u0111i qua c\u1ea7u ch\u00ec F2, \u0111i qua \u0111\u00e8n Q34( ban \u0111\u1ea7u \u0111\u00e8n Q34 \u0111\u01b0\u1ee3c \u0111i\u1ec1u khi\u1ec3n d\u1eabn m\u1eb7c \u0111\u1ecbnh), \u0111i qua \u0110iot trong \u0111\u00e8n Q36 v\u00e0o \u0111\u01b0\u1eddng VINT16( ngu\u1ed3n \u0111\u1ea7u v\u00e0o). <\/span>\u0110i\u1ec7n \u00e1p VINT16 \u0111i c\u1ea5p \u0111i\u1ec7n cho c\u00e1c ngu\u1ed3n xung c\u1ee7a m\u00e1y.<\/span><\/p>\n

B2:<\/strong> M\u1ed9t nh\u00e1nh \u0111i\u1ec7n \u00e1p DCIN \u0111i qua c\u1ea7u ch\u00ec F2 sau \u0111\u00f3 r\u1ebd qua R453, \u0111i qua \u0110iot D10, qua R413 v\u00e0o ch\u00e2n 57 c\u1ee7a IC-TB62501, sau \u0111\u00f3 t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCC3SW( 3V) \u1edf ch\u00e2n 59.<\/span>
\n\u0110\u1ed3ng th\u1eddi m\u1ea1ch d\u00f2 \u00e1p( Sensor) c\u0169ng ph\u00e1t hi\u1ec7n \u0111i\u1ec7n \u00e1p c\u1eafm qua c\u1ed5ng DCIN v\u00e0 b\u00e1o v\u1ec1 ch\u00e2n EXTPWR.<\/span><\/p>\n

B3:<\/strong> \u0110i\u1ec7n \u00e1p VCC3SW \u0111i sang c\u1ea5p ngu\u1ed3n cho IC-PMH4 qua c\u00e1c ch\u00e2n 7, 31, 59, 80, 98<\/span><\/p>\n

B4:<\/strong> Khi IC \u0111i\u1ec1u khi\u1ec3n ngu\u1ed3n PMH4 c\u00f3 ngu\u1ed3n c\u1ea5p 3V b\u1edfi \u0111i\u1ec7n \u00e1p VCC3SW, \u0111\u1ed3ng th\u1eddi ch\u00e2n EXTPWR c\u00f3 m\u1ee9c th\u1ea5p, IC s\u1ebd t\u1ef1 \u0111\u1ed9ng cho ra l\u1ec7nh VCC5M_ON \u0111\u01b0a sang \u0111i\u1ec1u khi\u1ec3n IC-MAX1631 \u0111\u1ec3 t\u1ea1o ra c\u00e1c \u0111i\u1ec7n \u00e1p c\u1ea5p tr\u01b0\u1edbc VCC5M, VCC3M v\u00e0 cho ra l\u1ec7nh VCC1R8M_ON \u0111\u01b0a sang \u0111i\u1ec1u khi\u1ec3n IC-MAX1845 t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCC1R8M v\u00e0 VCC1R2M.<\/span><\/p>\n

B5:<\/strong> Khi c\u00e1c ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc ho\u1ea1t \u0111\u1ed9ng t\u1ed1t, IC-TB62501 s\u1ebd ki\u1ec3m tra c\u00e1c \u0111i\u1ec7n \u00e1p tr\u00ean r\u1ed3i t\u1ea1o ra t\u00edn hi\u1ec7u MPWRGD b\u00e1o v\u1ec1 IC \u0111i\u1ec1u khi\u1ec3n ngu\u1ed3n PMH4.<\/span><\/p>\n

B6:<\/strong> IC-PMH4 s\u1ebd ph\u00e1t t\u00edn hi\u1ec7u PM_RSMRST# \u0111\u1ec3 kh\u1edfi \u0111\u1ed9ng m\u1ea1ch qu\u1ea3n l\u00fd ngu\u1ed3n trong Chipset nam, m\u1ea1ch n\u00e0y ho\u1ea1t \u0111\u1ed9ng \u0111\u1ec3 s\u1eb5n s\u00e0ng \u0111i\u1ec1u khi\u1ec3n m\u1ea1ch x\u1ea1c Pin ho\u1ea1t \u0111\u1ed9ng.<\/span><\/p>\n

B7 & B8:<\/strong> Khi b\u1ea5m c\u00f4ng t\u1eafc, ch\u00e2n PWRSW( ch\u00e2n 32) c\u1ee7a IC-PMH4 \u0111\u01b0\u1ee3c ch\u1eadp mass. IC-PMH4 cho ra c\u00e1c l\u1ec7nh m\u1edf ngu\u1ed3n th\u1ee9 c\u1ea5p, l\u1ec7nh B_ON( ch\u00e2n 70) v\u00e0 l\u1ec7nh VIDEOCORE_ON( ch\u00e2n 42) \u0111\u01b0a t\u1edbi \u0111i\u1ec1u khi\u1ec3n c\u00e1c ngu\u1ed3n xung v\u00e0 c\u00e1c \u0111\u00e8n c\u00f4ng t\u1eafc \u0111\u1ec3 t\u1ea1o ra \u0111i\u1ec7n \u00e1p th\u1ee9 c\u1ea5p.<\/span><\/p>\n

B9:<\/strong> L\u1ec7nh B_ON cho \u0111i qua IC_TB62501 t\u1ea1o ra c\u00e1c l\u1ec7nh 5B_DRV \u0111i\u1ec1u khi\u1ec3n \u0111\u00e8n c\u00f4ng t\u1eafc Q23 \u0111\u00f3ng \u0111i\u1ec7n \u00e1p VCC5M sang th\u00e0nh \u0111i\u1ec7n \u00e1p th\u1ee9 c\u1ea5p VCC5B v\u00e0 t\u1ea1o ra l\u1ec7nh 3B_DRV \u0111i\u1ec1u khi\u1ec3n \u0111\u00e8n c\u00f4ng t\u1eafc Q24 \u0111\u00f3ng \u0111i\u1ec7n \u00e1p VCC3M sang th\u00e0nh \u0111i\u1ec7n \u00e1p th\u1ee9 c\u1ea5p VCC3B.<\/span><\/p>\n

+ \u0110\u1ed3ng th\u1eddi l\u1ec7nh B_ON \u0111\u01b0\u1ee3c \u0111\u01b0a \u0111\u1ebfn IC-MAX1845 \u0111\u1ec3 \u0111i\u1ec1u khi\u1ec3n t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCCCPUIO c\u1ea5p ngu\u1ed3n ph\u1ee5 cho CPU v\u00e0 \u0111i\u1ec1u khi\u1ec3n \u0111\u1ec3 t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCC1R25B \u0111\u1ec3 c\u1ea5p ngu\u1ed3n ph\u1ee5 cho RAM.<\/span><\/p>\n

+ L\u1ec7nh VIDEOCORE_ON \u0111\u01b0a \u0111\u1ebfn \u0111i\u1ec1u khi\u1ec3n ngu\u1ed3n xung t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCCVIDEOCORE \u0111\u1ec3 c\u1ea5p cho chip Video.<\/span><\/p>\n

+ L\u1ec7nh VIDEOCORE_ON t\u1ea1o ra l\u1ec7nh A_ON r\u1ed3i \u0111\u01b0a \u0111\u1ebfn \u0111i\u1ec1u khi\u1ec3n c\u00e1c ngu\u1ed3n xung t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCC2R5A \u0111\u1ec3 c\u1ea5p ngu\u1ed3n ch\u00ednh cho RAM v\u00e0 Chipset b\u1eafc.<\/span><\/p>\n

+ \u0110i\u1ec7n \u00e1p VCC1R8M \u0111\u01b0\u1ee3c \u1ed5n \u00e1p xu\u1ed1ng \u0111i\u1ec7n \u00e1p VCC1R5M th\u00f4ng qua IC-VR4 v\u00e0 \u0111\u00e8n Q76 sau \u0111\u00f3 \u0111\u01b0\u1ee3c l\u1ec7nh B_ON \u0111i\u1ec1u khi\u1ec3n \u0111\u00f3ng sang th\u00e0nh \u0111i\u1ec7n \u00e1p VCC1R5B th\u00f4ng qua \u0111\u00e8n Q31 r\u1ed3i c\u1ea5p ngu\u1ed3n cho hai Chipset.<\/span><\/p>\n

+ \u0110i\u1ec7n \u00e1p VCC1R2M \u0111\u01b0\u1ee3c l\u1ec7nh B_ON \u0111i\u1ec1u khi\u1ec3n \u0111\u00e8n Q70 \u0111\u00f3ng sang th\u00e0nh \u0111i\u1ec7n \u00e1p VCC1R2B \u0111\u1ec3 c\u1ea5p ngu\u1ed3n ph\u1ee5 cho hai Chipset.<\/span><\/p>\n

B10:<\/strong> Khi c\u00e1c ngu\u1ed3n th\u1ee9 c\u1ea5p \u0111\u00e3 ho\u1ea1t \u0111\u1ed9ng \u1ed5n \u0111\u1ecbnh, t\u1eeb IC-TB62501 c\u00f3 t\u00edn hi\u1ec7u BPWRG b\u00e1o v\u1ec1 IC-PMH4 cho bi\u1ebft t\u00ecnh tr\u1ea1ng ngu\u1ed3n th\u1ee9 c\u1ea5p \u0111\u00e3 t\u1ed1t.<\/span><\/p>\n

B11:<\/strong> Sau khi c\u00e1c ngu\u1ed3n th\u1ee9 c\u1ea5p \u0111\u00e3 ho\u1ea1t \u0111\u1ed9ng \u1ed5n \u0111\u1ecbnh, IC-PMH4 m\u1edbi ra l\u1ec7nh VCORE_ON \u0111\u1ec3 cho ph\u00e9p m\u1ea1ch VRM ho\u1ea1t \u0111\u1ed9ng t\u1ea1o ra \u0111i\u1ec7n \u00e1p VCCCPUCORE c\u1ea5p ngu\u1ed3n ch\u00ednh cho CPU.<\/span><\/p>\n

B12 & B13:<\/strong> Khi c\u00f3 \u0111i\u1ec7n \u00e1p VCCCPUCORE ra chu\u1ea9n, t\u1eeb IC dao \u0111\u1ed9ng c\u1ee7a m\u1ea1ch VRM s\u1ebd c\u00f3 t\u00edn hi\u1ec7u VR_PWRGD b\u00e1o v\u1ec1 IC-PMH4 \u0111\u1ed3ng th\u1eddi cho ra t\u00edn hi\u1ec7u CLK_ENABLE \u0111\u1ec3 \u0111\u01b0a sang \u0111i\u1ec1u khi\u1ec3n cho m\u1ea1ch ClockGen ho\u1ea1t \u0111\u1ed9ng.<\/span><\/p>\n

B14:<\/strong> M\u1ea1ch ClockGen ho\u1ea1t \u0111\u1ed9ng v\u00e0 t\u1ea1o ra c\u00e1c xung Clock cung c\u1ea5p cho c\u00e1c th\u00e0nh ph\u1ea7n tr\u00ean m\u00e1y ho\u1ea1t \u0111\u1ed9ng \u0111\u1ec3 \u0111i\u1ec1u khi\u1ec3n t\u1ed1c \u0111\u1ed9 Bus v\u00e0 \u0111\u1ed3ng b\u1ed9 d\u1eef li\u1ec7u trong to\u00e0n h\u1ec7 th\u1ed1ng.<\/span><\/p>\n

B15:<\/strong> PMH4 t\u1ed5ng h\u1ee3p c\u00e1c t\u00edn hi\u1ec7u MPWRG, BPWRG v\u00e0 VR_PWRGD t\u1ea1o th\u00e0nh t\u00edn hi\u1ec7u ICH_PWROK b\u00e1o sang hai Chipset cho bi\u1ebft t\u00ecnh tr\u1ea1ng c\u1ee7a c\u00e1c m\u1ea1ch ngu\u1ed3n \u0111\u00e3 t\u1ed1t<\/span><\/p>\n

B16:<\/strong> M\u1ea1ch PM t\u00edch h\u1ee3p trong Chipset nam ho\u1ea1t \u0111\u1ed9ng sau khi c\u00f3 \u0111\u1ee7 ngu\u1ed3n c\u1ea5p, c\u00f3 xung Clock. Sau khi nh\u1eadn \u0111\u01b0\u1ee3c t\u00edn hi\u1ec7u ICH_PWROK, m\u1ea1ch PM s\u1ebd ph\u00e1t ra t\u00edn hi\u1ec7u Reset h\u1ec7 th\u1ed1ng( PCI_RST) \u0111\u1ec3 kh\u1edfi \u0111\u1ed9ng c\u00e1c b\u1ed9 ph\u1eadn c\u1ee7a m\u00e1y \u0111\u1ed3ng th\u1eddi ph\u00e1t t\u00edn hi\u1ec7u PWRGD b\u00e1o sang CPU.<\/span><\/p>\n

B17:<\/strong> Chipset b\u1eafc ho\u1ea1t \u0111\u1ed9ng( sau khi c\u00f3 t\u00edn hi\u1ec7u PCI_RST) kh\u1edfi \u0111\u1ed9ng v\u00e0 t\u1ea1o ra t\u00edn hi\u1ec7u CPURST# \u0111\u1ec3 kh\u1edfi \u0111\u1ed9ng CPU.<\/span><\/p>\n

B18:<\/strong> Sau khi nh\u1eadn \u0111\u01b0\u1ee3c c\u00e1c t\u00edn hi\u1ec7u PWRGD v\u00e0 CPURST# th\u00ec CPU s\u1ebd ho\u1ea1t \u0111\u1ed9ng. L\u1ec7nh m\u1eb7c \u0111\u1ecbnh \u0111\u01b0\u1ee3c c\u00e0i s\u1eb5n trong CPU l\u00e0 ph\u00e1t t\u00edn hi\u1ec7u truy c\u1eadp v\u00e0o \u0111\u1ecba ch\u1ec9 ROM \u0111\u1ec3 n\u1ea1p ch\u01b0\u01a1ng tr\u00ecnh BIOS, ban \u0111\u1ea7u s\u1ebd cho n\u1ea1p m\u1ed9t ph\u1ea7n c\u1ee7a BIOS v\u00e0o b\u1ed9 nh\u1edb Cache c\u1ee7a CPU r\u1ed3i ti\u1ebfn h\u00e0nh ch\u1ea1y ch\u01b0\u01a1ng tr\u00ecnh BIOS.<\/span><\/p>\n

B19:<\/strong> CPU ch\u1ea1y ch\u01b0\u01a1ng tr\u00ecnh BIOS v\u00e0 ch\u01b0\u01a1ng tr\u00ecnh n\u00e0y ti\u1ebfn h\u00e0nh ki\u1ec3m tra c\u00e1c thi\u1ebft b\u1ecb tr\u00ean m\u00e1y \u0111\u1ec3 ph\u00e1t hi\u1ec7n l\u1ed7i. Ban \u0111\u1ea7u BIOS s\u1ebd ki\u1ec3m tra Chipset b\u1eafc, sau \u0111\u00f3 \u0111\u1ebfn RAM, ti\u1ebfp \u0111\u00f3 \u0111\u1ebfn Chipset nam v\u00e0 chip Video. Sau khi ki\u1ec3m tra b\u1ed1n th\u00e0nh ph\u1ea7n tr\u00ean n\u1ebfu kh\u00f4ng ph\u00e1t hi\u1ec7n ra l\u1ed7i th\u00ec m\u00e1y s\u1ebd cho xu\u1ea5t t\u00edn hi\u1ec7u ra m\u00e0n h\u00ecnh.<\/span><\/p>\n

Ch\u00fa \u00fd: \u1ede tr\u00ean ta th\u1ea5y r\u1eb1ng qu\u00e1 tr\u00ecnh ho\u1ea1t \u0111\u1ed9ng c\u1ee7a kh\u1ed1i ngu\u1ed3n b\u1eaft \u0111\u1ea7u t\u1eeb b\u01b0\u1edbc 1 \u0111\u1ebfn b\u01b0\u1edbc 12.<\/span><\/em><\/p>\n

2. Hi\u1ec7n t\u01b0\u1ee3ng h\u1ecfng ngu\u1ed3n – B\u1eadt c\u00f4ng t\u1eafc m\u00e1y kh\u00f4ng c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n<\/strong><\/span><\/h2>\n
\"Hi\u1ec7n
Hi\u1ec7n t\u01b0\u1ee3ng h\u1ecfng ngu\u1ed3n – B\u1eadt c\u00f4ng t\u1eafc m\u00e1y kh\u00f4ng c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n<\/figcaption><\/figure>\n

3. Ph\u01b0\u01a1ng ph\u00e1p ki\u1ec3m tra b\u1eb1ng ngu\u1ed3n \u0111a n\u0103ng \u0111\u1ec3 chia nh\u1ecf ph\u1ea1m vi b\u1ecb nghi v\u1ea5n<\/strong><\/span><\/h2>\n
\"Ngu\u1ed3n
Ngu\u1ed3n \u0111a n\u0103ng – d\u1ee5ng c\u1ee5 \u0111\u1ec3 ki\u1ec3m tra kh\u1ed1i ngu\u1ed3n Laptop<\/figcaption><\/figure>\n

D\u00f9ng ngu\u1ed3n \u0111a n\u0103ng v\u00e0 c\u1ea5p \u0111i\u1ec7n thay th\u1ebf cho Adapter, b\u1ea1n s\u1ebd g\u1eb7p m\u1ed9t trong c\u00e1c tr\u01b0\u1eddng h\u1ee3p sau \u0111\u00e2y:<\/p>\n

B\u1ec7nh 1 – M\u00e1y b\u1ecb ch\u1eadp \u0111\u01b0\u1eddng VINT16 (ch\u1eadp \u0111\u01b0\u1eddng ngu\u1ed3n \u0111\u1ea7u v\u00e0o)<\/strong><\/p>\n

\"M\u00e1y
M\u00e1y b\u1ecb ch\u1eadp \u0111\u01b0\u1eddng VINT16<\/figcaption><\/figure>\n

B\u1ec7nh 2 – M\u00e1y kh\u00f4ng c\u00f3 ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc VCC5M v\u00e0 VCC3M<\/strong><\/p>\n

\"M\u00e1y
M\u00e1y kh\u00f4ng c\u00f3 ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc VCC5M v\u00e0 VCC3M<\/figcaption><\/figure>\n

\u0110\u1ec3 ch\u1eafc ch\u1eafn r\u1eb1ng ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc c\u1ee7a m\u00e1y \u0111\u00e3 c\u00f3, m\u00e1y \u0111\u00e3 c\u00f3 \u0111i\u1ec7n \u00e1p VCC5M (5V) v\u00e0 VCC3M (3V) b\u1ea1n h\u00e3y \u0111o v\u00e0o c\u00e1c ch\u00e2n Data, Clock v\u00e0 Temp c\u1ee7a Pin, n\u1ebfu c\u00e1c ch\u00e2n n\u00e0y c\u00f3 \u0111i\u1ec7n \u00e1p kho\u1ea3ng 3 \u0111\u1ebfn 5V th\u00ec ch\u1eafc ch\u1eafn l\u00e0 m\u00e1y \u0111\u00e3 c\u00f3 c\u00e1c ngu\u1ed3n \u0111i\u1ec7n tr\u00ean.<\/p>\n

B\u1ec7nh 3 – M\u00e1y \u0111\u00e3 c\u00f3 ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc 5V, 3V nh\u01b0ng khi b\u1ea5m c\u00f4ng t\u1eafc v\u1eabn kh\u00f4ng c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n.<\/strong><\/p>\n

\"M\u00e1y
M\u00e1y \u0111\u00e3 c\u00f3 ngu\u1ed3n c\u1ea5p tr\u01b0\u1edbc 5V, 3V nh\u01b0ng khi b\u1ea5m c\u00f4ng t\u1eafc v\u1eabn kh\u00f4ng c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n<\/figcaption><\/figure>\n

B\u1ec7nh 4 – M\u00e1y \u0111\u00e3 c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n nh\u01b0ng d\u00f2ng ti\u00eau th\u1ee5 ch\u1ec9 d\u1eebng \u1edf kho\u1ea3ng 0,4A kh\u00f4ng t\u0103ng th\u00eam.<\/strong><\/p>\n

\"M\u00e1y
M\u00e1y \u0111\u00e3 c\u00f3 \u0111\u00e8n b\u00e1o ngu\u1ed3n nh\u01b0ng d\u00f2ng ti\u00eau th\u1ee5 ch\u1ec9 d\u1eebng \u1edf kho\u1ea3ng 0,4A kh\u00f4ng t\u0103ng th\u00eam<\/figcaption><\/figure>\n

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M\u00e1y t\u00ednh IBM l\u00e0 d\u00f2ng m\u00e1y kh\u00e1 ph\u1ed5 bi\u1ebfn. V\u00ec v\u1eady, vi\u1ec7c ki\u1ec3m tra kh\u1ed1i ngu\u1ed3n m\u00e1y IBM l\u00e0 r\u1ea5t quan tr\u1ecdng. H\u00e3y c\u00f9ng HOCVIENiT.vn t\u00ecm hi\u1ec3u ph\u01b0\u01a1ng ph\u00e1p n\u00e0y nh\u00e9!<\/p>\n","protected":false},"author":95,"featured_media":12161,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[96,94],"tags":[678],"_links":{"self":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts\/1616"}],"collection":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/users\/95"}],"replies":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1616"}],"version-history":[{"count":0,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/posts\/1616\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=\/wp\/v2\/media\/12161"}],"wp:attachment":[{"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1616"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1616"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hocvienit.vn\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1616"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}